Substrates with electronically active components distributed over the extent of the substrate may be used in a variety of electronic systems, for example, flat-panel imaging devices, such as liquid crystal, organic light-emitting diode (OLED), or inorganic light-emitting diode (iLED) display devices, and solar cells.
One method used to distribute electronically active circuits over substrates includes sputtering a thin semiconductor layer over the substrate and then patterning the semiconductor layer to form electronically active circuits distributed over the substrate. This technique, although widely used in the display industry, has performance limitations. Despite processing methods used to improve the performance of thin-film transistors, such transistors may provide performance that is lower than the performance of other integrated circuits formed in mono-crystalline semiconductor material. Semiconductor material and active components can be provided only on portions of the substrate, leading to wasted material and increased material and processing costs. The choice of substrate materials can also be limited by the processing steps necessary to process the semiconductor material and the photo-lithographic steps used to pattern the active components. For example, plastic substrates have a limited chemical and heat tolerance and do not readily survive photo-lithographic processing. Furthermore, the manufacturing equipment used to process large substrates with thin-film circuitry is relatively expensive. Other substrate materials that may be used include quartz, for example, for integrated circuits using silicon-on-insulator structures as described in U.S. Patent Publication No. 2010/0289115 and U.S. Patent Publication No. 2010/0123134. However, such substrate materials can be more expensive, limited in size, or difficult to process.
In other manufacturing techniques, a mono-crystalline semiconductor wafer is employed as the substrate. While this approach can provide substrates with the same performance as integrated circuits, the size of such substrates may be limited, for example to a 12-inch diameter circle, the wafers are relatively expensive compared to other substrate materials such as glass, polymer, or quartz, and the wafers are rigid.
An alternative method used to distribute electronically active circuits over substrates includes forming the components on separate source wafers, removing them from the source wafers, and placing the components on the desired substrate. In this case, a variety of assembly technologies for device packaging may be used, for example, pick-and-place technologies for integrated circuits provided in a variety of packages such as pin-grid arrays, ball-grid arrays, and flip-chips. However, these techniques may be limited in the size of the integrated circuits that can be placed so that the integrated circuits and their packaging can be larger and more expensive than is desired.
Other methods for transferring active components from a source wafer to a desired substrate are described in U.S. Pat. No. 7,943,491. In certain embodiments of these methods, small integrated circuits are formed on a semiconductor wafer. The small integrated circuits, or chiplets, are released from the wafer by etching a layer formed beneath the circuits. A stamp, for example a PDMS stamp, is pressed against the wafer and the process side of the chiplets is adhered to the stamp. The chiplets on the stamp are pressed against a destination substrate or backplane and adhered to the destination substrate. U.S. Pat. No. 8,722,458 entitled Optical Systems Fabricated by Printing-Based Assembly teaches, inter alia, transferring light-emitting, light-sensing, and light-collecting semiconductor elements from a wafer substrate to a destination substrate or backplane.
In some cases, the source wafer or destination substrate can have particulate contamination that inhibits element transfer from the source wafer to the destination substrate by the stamp, for example due to process abnormalities or undesired particles on the stamp, the source wafer, or the destination substrate. It is also possible that the elements themselves are defective due to materials or manufacturing process errors in the wafer. Such problems can reduce manufacturing yields, increase product costs, and necessitate expensive repair or rework operations.
Electrical connections between the small integrated circuits and the backplane contact pads are typically made by photolithographic processes in which a metal is evaporated or sputtered onto the small integrated circuits and the destination substrate to form a metal layer, the metal layer is coated with a photoresist that is exposed to a circuit connection pattern, and the metal layer and photoresist are developed by etching and washing to form the patterned electrical connections between the small integrated circuits and the connection pads on the destination substrate. Additional layers, such as interlayer dielectric insulators can also be required. This process is expensive and requires a number of manufacturing steps. Moreover, the topographical structure of the small integrated circuits over the destination substrate renders the electrical connections problematic, for example it can be difficult to form a continuous conductor from the destination substrate to the small integrated circuit because of the differences in height over the surface between the small integrated circuits and the destination substrate.
Surface-mount devices (SMDs) are an alternative way to provide electrical elements on a substrate or backplane. Such devices, as their name suggests, include electrical connections that are typically placed on the surface and in contact with a backplane rather than including pins that extend through vias in the backplane. Surface-mount technology (SMT) is widely used in the electronics industry to provide high-density printed-circuit boards (PCBs). In particular, a well-developed and inexpensive infrastructure exists for making and integrating two-terminal surface-mount devices, such as resistors or capacitors, into printed circuit boards. However, the smallest surface-mount device readily available is several hundred microns long and wide, precluding their use for applications requiring integrated circuits with circuit elements having a size of several microns, or less, for example.
There is a need, therefore, for structures and methods that enable the electrical interconnection of small integrated circuits (chiplets) at a high resolution, such as transfer printed chiplets, to destination substrates in a cost-effective and robust way with excellent yields.